FLiT: Locating Floating-Point Variability Induced By Compiler Optimizations
about
Numerical reproducibility across compilers is desired, but not guaranteed under certain compiler optimizations. Compiling using aggressive optimizations (e.g., -O3 and Fast-Math) can give vastly different program results from the reference baseline – not because the compiler has a bug, but because of floating-point rounding effects. This can undermine one’s quest for higher speed by giving the wrong answer. FLiT is a reproducibility test framework in the PRUNERS toolset (see https://pruners.github.io), where hundreds of compilations across a variety of compilers and optimization levels are run and compared to a reference baseline compilation.
The Numerical Hardware Design Landscape: Challenges and Opportunities
about
Numerical hardware design is most challenging and most valuable when the hardware concerned is dominated by diverse and evolving compute tasks, and pushed to the limit in terms of needing low area, high frequency & low power consumption. GPU hardware design offers such a multi-faceted challenge. This talk will walk through the potency of optimizations at an algorithm, number format, precision, accuracy and logic gate level; show key examples of hardware design space definition and exploration, and the general challenges of doing so: algorithm design, specification creation, modelling, hardware implementation & optimization with formal verification and validation used throughout.
FPTalks 2021, a workshop for leading edge Floating-Point Research
about
FPTalks is an annual workshop hosted by Dr. Pavel Panchekha. It brings together researchers to discuss the ongoing work in floating- point research and share achievements. It is a part of the FPBench community.